AMD has quietly disabled the Loop Buffer feature on its Zen 4 processors via an AGESA microcode update. This change affects all Zen 4 processors, including the Ryzen 7000 and Ryzen 7000X3D desktop chips.
The Loop Buffer feature was introduced by AMD to improve the performance and efficiency of Zen 4 processors. In general, it is a widespread technology in modern processors, used not only by AMD, but also by Intel and Arm. In fact, it is a small, dedicated storage located on the chip for instructions used in loops—sequences of instructions that are repeated many times during the execution of a program. This buffer eliminates the need to constantly query these instructions from cache or RAM, thereby improving performance and energy efficiency.
However, due to the lack of detailed documentation, application developers were unable to ensure the optimal operation of the Loop Buffer mechanism and realize its potential. Therefore, the innovation did not produce the expected effect. Removing the feature, according to experts, will not affect the overall performance of the chips. This is due to the larger decoded micro-op cache in Zen 4 compared to its predecessors, which has taken over the looping tasks originally intended for the Loop Buffer.
According to Chips and Cheese, which first discovered the Loop Buffer deactivation, the feature was deactivated sometime between the release of the AGESA 1.0.0.6 and AGESA 1.2.0.2a library packages. When testing the Ryzen 9 7950X3D processor on the ASRock B650 PG Lightning motherboard, it turned out that the function worked in BIOS version 1.21 (AGESA 1.0.0.6), but after updating to BIOS 3.10 based on AGESA 1.2.0.2a, it stopped working.
Chips and Cheese tested the Ryzen 9 7950X3D processor in the SPEC CPU2017 benchmark using the old and new BIOS to evaluate the possible performance impact of disabling the Loop Buffer. Tests showed a performance hit of less than 1% when performing integer and floating point operations, while multi-threaded performance remained unchanged. In Cyberpunk 2077, disabling the Loop Buffer had no impact when using chiplet cores with 3D V-Cache, but on a chiplet without 3D V-Cache there was a 5% decrease in performance.
At the Hot Chips 2024 conference, AMD engineers called the Loop Buffer in Zen 4 processors “a feature primarily designed to optimize power consumption” rather than improve performance. Judging by the Chips and Cheese tests, this statement is true, since the impact of the feature on the performance of Ryzen processors was minimal.
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