Intel outlined the benefits of its 18-angstrom Intel 18A process node over the current 3-nanometer Intel 3 node ahead of the VLSI 2025 Symposium. Intel 18A is the company’s first node to use RibbonFET transistors with an innovative gate-all-around (GAA) architecture and back-side power delivery (BSPDN) – PowerVia.
Image source: Intel
Intel claims that its 18A process delivers 25% higher performance at the same voltage (1.1V) and complexity, and 36% lower power consumption at the same frequency and voltage (1.1V) for a standard Arm core subblock compared to the same block made using Intel’s 3.0 technology. At a lower voltage (0.75V), Intel’s 18A delivers 18% higher performance and 38% lower power consumption.
Intel notes the high degree of physical scaling in the Intel 18A process technology compared to Intel 3 for both the High Performance Library (HP) and High Density Library (HD) solutions. Intel 18A reduces the cell height from 240CH to 180CH in the HP libraries and from 210CH to 160CH in the HD libraries, representing a roughly 25 percent reduction in vertical dimension. The denser cell architecture enables higher transistor density, which directly contributes to improved area efficiency.
The use of PowerVia connectivity enables more efficient vertical routing by moving power lines from the front to the back, freeing up space for signal routing and further compacting the package. Additionally, improved gate, source/drain, and contact structures improve overall cell uniformity and integration density. Together, these improvements enable Intel 18A to deliver better performance per unit area and high power efficiency while supporting more advanced and compact chip designs.
Intel is reportedly on track to begin volume production of compute chiplets for Panther Lake client PC processors later this year, followed by chiplets for Clearwater Forest data center processors in early 2026. The company will also begin production of the 18A process for commercial customers in mid-2025.
Intel also plans to submit a paper describing a Pulse-Amplitude Modulation (PAM-4) transmitter implemented using the 18A node with PowerVia BSPDN. The transmitter is a joint effort between engineers at Intel, Alphawave Semi, Apple, and Nvidia. This doesn’t mean that Apple or Nvidia will use Intel’s 18A process, but at least they, like many other companies, are interested in proving its real capabilities.
According to TSMC, almost all of the company’s partners (primarily Apple and Nvidia) plan to use its N2 (2 nm class) process technology, so it will most likely be in greater demand than Intel’s 18A. However, it is extremely important for Intel to show that it still knows how and can develop competitive technologies and ensure the production of large volumes of semiconductor products.
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