Fujitsu spoke about a 2nm competitor to Epyc and Xeon – the 144-core Monaka Arm processor with SRAM cache

Fujitsu showed a sample of its 144-core Monaka processor based on Armv9 architecture – it is designed for work in data centers. The Japanese company developed it jointly with Broadcom – the processor is built on the 3.5D eXtreme Dimension System in Package platform.

Image source: Broadcom

Fujitsu Monaka is a large System-in-Package (SiP) CoWoS system consisting of four 36-core processor chiplets manufactured using TSMC’s 2nm N2 process technology, delivering 144 cores on the Armv9 architecture. The core dies are placed on top of SRAM chiplets in a F2F (Face-to-Face) layout using Hybrid Copper Bonding (HCB). SRAM chiplets – huge cache modules – are manufactured using TSMC N5 technology. Working together with the logic and memory chiplets is a huge I/O crystal, which includes a memory controller, PCIe 6.0 lanes with CXL 3.0 at the top for connecting accelerators and other components, as well as other interfaces required in the data center.

The processor does without HBM memory, content with mass DDR5 – possibly in MR-DIMM and MCR-DIMM implementations. Fujitsu Monaka cores support the Armv9-A and SVE2 (Scalable Vector Extensions 2) instructions. The manufacturer did not specify the fixed vector length when processing instructions – it can be from 128 to 2048 bits; Given that the A64FX chips support vectors up to 512 bits, Monaka will support vectors of at least the same size. The processor supports advanced security features, including the Confidential Computing Architecture (CCA), which offers improved workload isolation.

Direct competitors of Fujitsu Monaka are AMD Epyc and Intel Xeon, so the Japanese processor should have an advantage – it could be energy efficiency, which by 2026-2027, when it is released, will be twice as good as similar solutions on x86, the manufacturer hopes. The processor will go on sale in fiscal year 2027, from April 1, 2026 to March 31, 2027.