Ampere Computing has announced the AmpereOne M processor family, designed specifically to support resource-intensive AI workloads in data centers. The chips are said to be suitable for inference tasks, working with large language models (LLM), generative AI, etc.
The new products were first announced last summer. The processors are configured with 96 to 192 customized 64-bit cores based on Arm v8.6+. There is 16 KB of instruction cache and 64 KB of L1 data cache per core, as well as 2 MB of L2 cache per core. The system cache is 64 MB. There are 12 channels of DDR5-5600 (one DIMM module per channel is supported) with the ability to address up to 3 TB of memory.
Image source: Ampere
The design of the chips includes 96 PCIe 5.0 lines with bifurcation support up to x4 mode and the ability to use up to 24 discrete connected devices. Virtualization tools, memory encryption, support for I2C, GPIO, QSPI and GPI interrupts, system and watchdog timers are mentioned. Advanced security features are provided, including increased performance of RNG, SHA512, SHA3 cryptographic algorithms.
The AmpereOne M series currently includes six models with clock speeds ranging from 2.6 to 3.6 GHz. The TDP ranges from 239 to 348 W. The intelligent high-bandwidth network and a large number of single-threaded computing cores provide linear performance scaling depending on the current workload. Dynamic power optimization is possible.
The processors use a 7228-pin FCLGA socket and are manufactured using TSMC’s 5nm process technology. According to Ampere, the new CPUs are suitable for use in high-density server rack systems, which reduces operating costs compared to GPU-based AI infrastructure.