The Belgian research center Imec collaborates with world leaders in the field of lithography, and therefore its leadership can represent the path of development of the entire semiconductor industry for several years to come. In his opinion, by 2037 chip manufacturers will be able to master the A2 process technology, and three years later they will be able to overcome the 0.1 nm barrier.
Image source: imec
Based on the designations adopted by TSMC, the A2 process technology corresponds to lithographic standards of 0.2 nm or 20 angstroms. Thus, in 2040, the semiconductor industry could break the 10 angstrom barrier if the predictions of Imec CEO Luc Van den Hove come true. He made his statements at a technology forum in Taiwan, which was widely covered by local media.
Next year, the semiconductor industry will begin production of 2nm chips, and as part of this process technology, the transistor structure will change from FinFET to Nanosheet, and in 2027, after the transition to the A7 process technology, the CFET transistor structure will be introduced. According to an Imec representative, the release of chips using A14 technology will imply a mandatory transition to the use of equipment with a high numerical aperture value (High-NA EUV), and therefore for TSMC such a migration becomes almost predetermined. Let us recall that the world’s largest contract chip manufacturer has repeatedly stated that it has no intention to use such equipment when producing products using A16 technology. The Taiwanese giant plans to master it in the second half of 2026.