As noted earlier, the young Japanese company Rapidus sets itself the goal of not only establishing the processing of silicon wafers using the country’s leading 2nm process technology by 2027, but also independently packaging chips using a complex spatial arrangement. Management believes that automating these operations will reduce lead times by three times compared to competitors.
Image source: Rapidus
At least, such assessments are given by Rapidus President Atsuyoshi Koike in an interview with Nikkei Asian Review. For a new player in the market for contract manufacturing of advanced chips, such speed should be an important advantage. Until now, chip testing and packaging operations have been poorly automated, but Rapidus intends to make some progress in this regard. To do this, the company needs to actively cooperate not only with equipment suppliers, but also with manufacturers of consumables. Koike insists Japanese companies need to be more open about intellectual property protection so they can create common industry standards that will save time and money on chip packaging.
The actual construction of the Rapidus facility on the island of Hokkaido should be completed by October of this year, and in December the company already expects to begin installing Japan’s first lithographic scanner for working with ultra-hard ultraviolet radiation (EUV). In 2025, it is planned to begin production of test chips using 2nm technology, and their mass production will be launched in 2027. By the time the production of samples of 2nm Rapidus chips begins, about $14 billion in investments will be required, and to launch mass production – at least $35 billion. The government of the country admitted that the already allocated $6.2 billion in subsidies is the limit of the ability to support the company from the budget, therefore Further financing is expected to be organized through commercial loans, for which the Japanese state will act as a guarantor.