JEDEC Reveals Details of Future DDR5 MRDIMM and LPDDR6 CAMM Memory Modules for HPC and AI

The JEDEC today revealed key details about the upcoming DDR5 MRDIMM (Multiplexed Rank Dual Inline Memory Module) and LPDDR6 CAMM (Compression-Attached Memory Module) memory module standards. The new modules are expected to revolutionize the industry with unprecedented bandwidth and memory capacity.

Image source: Micron

The JEDEC MRDIMM standard provides twice the peak bandwidth of standard DRAM, enabling applications to achieve new levels of performance. It supports the same capacity, reliability, availability and serviceability features as JEDEC RDIMM. Memory bandwidth will increase to 12.8 Gbit/s. The MRDIMM is expected to support more than two ranks using standard DDR5 DIMM components to ensure compatibility with conventional RDIMM systems.

DDR5 MRDIMMs are an innovative and efficient design that improves data transfer rates and overall system performance. Multiplexing allows multiple data signals to be combined and transmitted over a single channel, effectively increasing bandwidth without the need for additional physical connections. Other planned features include:

• Platform compatible with RDIMM for flexible end-user throughput configuration.
• Uses standard DDR5 DIMM components including DRAM, DIMM form factor and pinout, SPD, PMIC and TS for ease of implementation.
• Efficient I/O scaling using RCD/DB logic process capabilities.
• Leverage existing LRDIMM ecosystem to design and test infrastructure.
• Supports scaling across multiple generations of modules.

Plans are reported to create memory modules in the Tall MRDIMM form factor, which will provide higher bandwidth and capacity without changes to DRAM packaging. This higher form factor will allow for twice as many single-chip DRAM packages to be installed without the need for a 3DS package.

As a development of the JESD318 CAMM2 standard, the next generation LPDDR6 CAMM module standard is being developed, designed for a maximum speed of more than 14.4 GT/s. The module will use a 48-bit channel, consisting of two 24-bit subchannels, and will be equipped with a connector, eliminating the need for wiring on the motherboard. LPDDR memory has lower power consumption compared to conventional RAM modules and is typically used in compact and thin laptops, as well as smartphones and tablets.

Image source: JEDEC

These designs are currently in development at JEDEC’s JC-45 Committee on DRAM Modules. JEDEC encourages companies to join and help shape the future of JEDEC standards. Membership provides access to pre-publication proposals and early information on active projects. In total, 332 companies are registered with JEDEC, which in one form or another use the specifications of various types of RAM adopted by the organization.